SPICARD Registers

SPICARD Registers

Registers #

Old3DSNameAddressWidthRWUsed by
YesNSPI_CNT0x1000D8004RW
YesNSPI_DONE0x1000D8044RW
YesNSPI_BLKLEN0x1000D8084RW
YesNSPI_FIFO0x1000D80C4RW
YesNSPI_STATUS0x1000D8104R
YesNSPI_AUTOPOLL0x1000D8144RW
YesNSPI_INT_MASK0x1000D8184W?
YesNSPI_INT_STAT0x1000D81C4RW

NSPI_CNT #

BITDESCRIPTION
0-2Baud Rate
6-7Unused device select.
12Bus Mode
13Transfer Mode (0 = read, 1 = write)
15Trigger (0 = idle, 1 = busy)

This register seems to have a bug where the lower 8 bits are shifted up by 16 when reading this register.

NSPI_DONE #

Contains 1 when the SPI slave is selected. A 0 is written here on transfer end to deselect the slave.

NSPI_BLKLEN #

BITDESCRIPTION
0-20Transfer size
21-31Unused

NSPI_FIFO #

BITDESCRIPTION
0-31Data

This FIFO is one way (half-duplex).

NSPI_STATUS #

BITDESCRIPTION
0FIFO Full (0 = not full, 1 = full)

NSPI_AUTOPOLL #

BITDESCRIPTION
0-7Command
16-19Timeout (Tries = 31<<Baudrate (from NSPI_CNT) + Timeout)
24-26Bit offset (0-7)
30Poll for a set or unset bit
311 = Enable/Busy

This automatically sends a command to the device and compares the specified bit in the response with bit 30 until it matches or a timeout occurs. Nintendo uses a timeout of 10 which roughly equals 1 second. This is used in Process9 to poll the gamecard SPI flash status register for write operation finished or write enable.

NSPI_INT_MASK #

BITDESCRIPTION
0Transfer finished (1 = disabled)
1Autopoll success (1 = disabled)
2Autopoll timeout (1 = disabled)

NSPI_INT_STAT #

BITDESCRIPTION
0Transfer finished (also fires on each autopoll try?)
1Autopoll success
2Autopoll timeout

Interrupt ID 23 is fired when any of the bits change to 1 except for interrupts masked in NSPI_INT_MASK. Writing 1 to a bit in this register aknowledges the interrupt.