SHA Registers

SHA Registers

Registers #

Old3DSNameAddressWidthUsed by
YesSHA_CNT0x1000A0004Boot9, Process9
YesSHA_BLKCNT0x1000A0044Process9
YesSHA_HASH0x1000A0400x20Process9
YesSHA_FIFO0x1000A0800x40Boot9, Process9

SHA_CNT #

BitsDescription
0Start (1=enable/busy, 0=idle)
1Final round (1=enable/busy, 0=normal)
2Input DMA enable (1= enable, 0=disable)
3Output Endianess (0=little, 1=big)
4-5Mode (0=SHA256, 1=SHA224, 2=3=SHA1)
6?
7?
8Clear FIFO? When set, the *entire* ARM9 hangs/crashes when attempting to read SHA_INFIFO.
9Enable FIFO (1=fifo, 0=write-only)
10Output DMA enable (1= enable, 0=disable)
16?
17?

Bit 8 is used when boot9 chains eMMC reads with AES and SHA to to load, decrypt and verify FIRM partitions.

SHA_BLKCNT #

This reg contains the total size of the data written to REG_SHA_IN, this field is updated when performing hash-function final-round.

SHA_HASH #

This reg contains the SHA* hash after the final round, and the internal state during normal rounds. It is possible to write the internal state using this register.

SHA_FIFO #

The data to be hashed must be written here. It does not matter what offset is written to.