Extended Header

Extended Header

This page documents the format of the NCCH Extended Header, or exheader for short.

The exheader has two sections:

  • The actual exheader data, containing System Control Info (SCI) and Access Control Info (ACI);
  • A signed copy of NCCH HDR public key, and exheader ACI. This version of the ACI is used as limitation to the actual ACI.

Main Structure #

All values are little endian unless otherwise specified.

See also: 🔗 1

OffsetSizeDescription
0x00x200SCI
0x2000x200ACI
0x4000x100AccessDesc signature (RSA-2048-SHA256)
0x5000x100NCCH HDR RSA-2048 public key
0x6000x200ACI (for limitation of first ACI)

The AccessDesc signature covers the NCCH HDR public key and second ACI. The AccessDesc public key is initialised by the boot ROM.

When loading the exheader, Process9 compares the exheader data with the data in the AccessDesc (note that not everything is compared here). When these don’t match, an error is returned. The Process9 code handling this validation was updated with v6.0; the only change in this function seems to be the check for the “Ideal processor” field.

System Control Info #

OffsetSizeDescription
0x00x8Application title (default is “CtrApp”)
0x80x5Reserved
0xD0x1Flag (bit 0: CompressExefsCode, bit 1: SDApplication)
0xE0x2Remaster version
0x100xCText code set info
0x1C0x4Stack size
0x200xCRead-only code set info
0x2C0x4Reserved
0x300xCData code set info
0x3C0x4BSS size
0x400x180 (48*8)Dependency module (program ID) list
0x1C00x40SystemInfo

Most of these fields are used in LOADER:LoadProcess.

Code Set Info #

OffsetSizeDescription
0x04Address
0x44Physical region size (in page-multiples)
0x84Size (in bytes)

System Info #

OffsetSizeDescription
0x00x8SaveData Size
0x80x8Jump ID
0x100x30Reserved

Access Control Info #

OffsetSizeDescription
0x00x170ARM11 local system capabilities
0x1700x80ARM11 kernel capabilities
0x1F00x10ARM9 access control

ARM11 Local System Capabilities #

OffsetSizeDescription
0x00x8Program ID
0x80x4Core version (The Title ID low of the required FIRM)
0xC0x2Flag1 and Flag2 (both implemented starting from 8.0.0-18).
0xE0x1Flag0
0xF0x1Priority
0x100x20 (16*2)Resource limit descriptors. The first byte here controls the maximum allowed CpuTime.
0x300x20Storage info
0x500x100 (32*8)Service access control
0x1500x10 (2*8)Extended service access control, support for this was implemented with 9.3.0-X.
0x1600xFReserved
0x16F0x1Resource limit category. (0 = APPLICATION, 1 = SYS_APPLET, 2 = LIB_APPLET, 3 = OTHER (sysmodules running under the BASE memregion))

Flag0 #

BitsDescription
0-1Ideal processor
2-3Affinity mask
4-7Old3DS system mode
Old3DS System Mode #
ValueDescription
0Prod (64MB of usable application memory)
1Undefined (unusable)
2Dev1 (96MB of usable application memory)
3Dev2 (80MB of usable application memory)
4Dev3 (72MB of usable application memory)
5Dev4 (32MB of usable application memory)
6-7Undefined Same as Prod?

In the exheader data, the ideal processor field is a bit-index, while in the AccessDesc the ideal processor field is a bitmask. When the bit specified by the exheader field is not set in the AccessDesc field, an error is returned.

if((1 << exheaderval) & accessdescval == 0) return error

During a FIRM-launch when a TitleInfo structure was specified, the field at offset 0x400 in the FIRM-launch parameters is set to the SystemMode of the specified title, however in some cases other values are written there. With 8.0.0-18 NS will now check the output of PTMSYSM command 0x040A0000, when the output is non-zero and a certain NS state field is value-zero, the following is executed otherwise this is skipped. With that check passed on 8.0.0-18, NS will then check (Flag2 & 0xF). When that is value2, the output value (used for the FIRM-launcher parameter field mentioned above) is set to value7. Otherwise, when that value is non-zero, the output value is set to 6.

Flag1 #

BitsDescription
0EnableL2Cache (Unknown what this actually does, New3DS-only presumably)
1cpuspeed_804MHz (Default “cpuspeed” when not set)
2-7Unused

In order for the exheader to have any of the above new bits set, the AccessDesc must have the corresponding bit set, otherwise the invalid-exheader error is returned.

Homebrew which runs under a title which has the above cpuspeed flag set, runs much faster on New3DS. It’s unknown how exactly the system handles these flags.

When launching titles / perhaps other things with APT, NS uses PTMSYSM:ConfigureNew3DSCPU with data which originally came from these flags; NS does this regardless of what the running 3DS system is. However, due to a bug(?) in NS the value sent to that command is always either 0x0 or 0x3. When calculating that value, the code only ever uses the cpuspeed field, not the cache field: code to actually load and check the value of the cache field appears to be missing.

Flag2 #

BitDescription
0-3New3DS system mode
4-7Unused
New3DS System Mode #
ValueDescription
0Legacy (use Old3DS system mode)
1Prod (124MB of usable application memory)
2Dev1 (178MB of usable application memory)
3Dev2 (124MB of usable application memory)
4-7Undefined Same as Prod?

When in Legacy mode, the actual memory layout is the same as in New3DS Prod, except the available application memory as reported to the application is reduced to the Old3DS size.

The exheader value for the New3DS system mode value must be ≤ to the AccessDesc value, otherwise the invalid-exheader error is returned.

Storage Info #

Used in FSReg:Register.

OffsetSizeDescription
0x08Extdata ID
0x88System savedata IDs
0x108Storage accessible unique IDs
0x187Filesystem access info
0x1F1Other attributes

File System Access Info:

Bit and bitmaskDescription
0, 0x1Category system application
1, 0x2Category hardware check
2, 0x4Category filesystem tool
3, 0x8Debug
4, 0x10TWL card backup
5, 0x20TWL NAND data
6, 0x40BOSS
7, 0x80sdmc:/
8, 0x100Core
9, 0x200nand:/ro/ (Read Only)
10, 0x400nand:/rw/
11, 0x800nand:/ro/ (Write Access)
12, 0x1000Category system settings
13, 0x2000Cardboard
14, 0x4000Export/Import IVS
15, 0x8000sdmc:/ (Write-only)
16, 0x10000Switch cleanup (Introduced in 3.0.0?)
17, 0x20000Savedata move (Introduced in 5.0.0)
18, 0x40000Shop (Introduced in 5.0.0)
19, 0x80000Shell (Introduced in 5.0.0)
20, 0x100000Category home menu (Introduced in 6.0.0)
21, 0x200000Seed DB. Introduced in 9.6.0-X FIRM. Home Menu has this bit set starting with 9.6.0-X.

Other Attributes #

BitDescription
0Not use ROMFS
1Use Extended savedata access.

When Bit1 is set, the “Extdata ID” and “Storage Accessable Unique IDs” regions are used to store a total of 6 “Accessible Save IDs”. Introduced in 6.0.0.

Service Access Control #

This is the list of services which the process is allowed to access, this is registered with the services manager. Each service listed in the exheader must be listed in the AccessDesc, otherwise the invalid exheader error is returned. The order of the services for exheader/AccessDesc doesn’t matter. The AccessDesc can list services which are not in the exheader, but normally the service-access-control data for exheader/AccessDesc are exactly the same.

This list is submitted to SRVPM:RegisterProcess.

ARM11 Kernel Capabilities #

The kernel capability descriptors are passed to svcCreateProcess.

OffsetSizeDescription
0x00x70 (28*4)Descriptors
0x700x10Reserved

There are different descriptor types, determined by the number of leading ones in the binary value representation of bits 20-31. The different types are laid out as follows:

Pattern of bits 20-31TypeFields
0b1110xxxxxxxxInterrupt info
0b11110xxxxxxxSystem call maskBits 24-26: System call mask table index; Bits 0-23: mask
0b1111110xxxxxKernel release versionBits 8-15: Major version; Bits 0-7: Minor version
0b11111110xxxxHandle table sizeBits 0-18: size
0b111111110xxxKernel flagsSee below
0b11111111100xMap IO/static address rangeDescribes a memory mapping like the 0b111111111110 descriptor, but an entire range rather than a single page is mapped. Another 0b11111111100x descriptor must follow this one to denote the (exclusive) end of the address range to map. Bit20 on the first descriptor: map read-only (otherwise RW), bit20 on the second descriptor: map static (cacheable, otherwise IO if the bit is not set)
0b111111111110Map IO memory pageBits 0-19: page index to map (virtual address >> 12; the physical address is determined per-page according to Memory layout); Bit 20: Map read-only (otherwise read-write)

ARM11 Kernel Flags #

BitDescription
0Allow debug
1Force debug
2Allow non-alphanum
3Shared page writing
4Privilege priority
5Allow main() args
6Shared device memory
7Runnable on sleep
8-11Memory type (1: application, 2: system, 3: base)
12Special memory
13Process has access to CPU core 2 (New3DS only)

ARM9 Access Control #

OffsetSizeDescription
0x015Descriptors
0xF1ARM9 Descriptor Version. Originally this value had to be ≥ 2. Starting with 9.3.0-X this value has to be either value 2 or value 3.

Descriptors:

BitDescription
0Mount nand:/
1Mount nand:/ro/ (Write Access)
2Mount twln:/
3Mount wnand:/
4Mount card SPI
5Use SDIF3
6Create seed
7Use card SPI
8SD application (Not checked)
9Mount sdmc:/ (Write Access)